The present invention relates to the field of semiconductor devices and their manufacture. More specifically the invention provides an improved buried layer fabrication scheme suitable for both bipolar and BiCMOS applications.
Bipolar and complimentary metal-oxide semiconductor (CMOS) devices and their fabrication are well known. Recently, bipolar and CMOS devices have been combined on a single substrate to form BiCMOS circuits. One of the first steps in the formation of both bipolar devices and BiCMOS circuits is the fabrication of the buried layer. Fabrication of the buried layer is one of the most critical steps for achieving both high yield and low manufacturing cost. In bipolar devices, the buried layer regions reduce R.sub.c (the collector resistance) by providing a low resistance path from the collector contact to the active portion of the transistor. In BiCMOS applications, the buried layer further improves the latch-up immunity of the circuit.
FIG. 1 illustrates a cross-sectional view of one method of formation of a buried layer for a bipolar device. Referring to FIG. 1A, the first step in the formation of a buried layer is the growth of a thick oxide layer 110 over the wafer substrate 112. Typically the oxide layer 110 is in the range of 5,000 to 10,000 .ANG.. As can be seen in FIG. 1A, after formation of the thick oxide layer 110, a photoresist mask 114 is formed on the surface of the layer 110. Mask formation is followed by a series of etches to etch through the thick oxide layer 110 in areas where the buried layer is to be formed. First, a plasma etch is used to etch through the oxide layer 110 to the region immediately before the surface 116 of the substrate 112. Upon nearing the interface between the oxide region 110 and the substrate surface 116, a wet etch is performed to complete the etch to the substrate surface 116. The plasma etch is used to reduce device spacing by eliminating the undercutting typical of a wet etch. However, if allowed to reach the surface 116, the plasma etch process may extend into the substrate and damage the substrate 112. Thus a wet etch is performed to complete the etch to the surface 116 of the substrate. FIG. 1B shows the resultant structure after removal of the thick oxide layer 110 in areas where the buried layer region is to be formed.
Referring to FIG. 1C, after the step of etching the oxide layer 110 to the substrate surface 116, the photoresist layer 114 is removed and a thin oxide layer 118 is grown. The thin oxide layer 118 which is grown over the substrate surface 116 acts as a thin screen oxide for a subsequent implant step. Growth of oxide layer 118 is followed by an n+ ion implant on the order of 10.sup.15 atoms/per cubic centimeter. After the implant step, an anneal step is employed. The anneal drives the n-type dopant deeper into the substrate 112 and repairs, to a large extent, crystalline damage from the implant step. Some additional oxide is typically formed at the substrate surface 116 in this step.
After the anneal step, a third oxidation step follows resulting in an increase in the thickness of oxide layer 110 as seen in FIG. 1D. The oxidation step drives the n-type dopant (region 120) further into the substrate 112 resulting in further deepening of the buried layer 120. The oxidation step also generates a steps 124 at the silicon surface, bounding the buried layer window. The step 124 is a result of the fact that the oxidation in the field regions proceeds slowly due to the thick oxide 110, which retards the amount of oxygen reaching the silicon surface.
FIG. 1E shows the silicon wafer after removal of the oxide layer 110 and after deposition of an epitaxial layer 122. The silicon steps 124 propagate through the epitaxial layer 122 and become alignment marks for subsequent mask levels that are aligned with the buried layer 120. The epitaxial layer 122 will later be used for formation of the active regions of the bipolar devices.
One problem associated with the described buried layer fabrication process is the requirement of a dedicated plasma etch to open windows in the oxide wherever the buried layer is to be formed. A plasma etch is used instead of a chemical etch because a wet etch is isotropic and will severely undercut the oxide. Although a plasma etch will not significantly undercut the oxide layer, a plasma etch is expensive and time consuming relative to a chemical etch. Plasma etches can also cause crystalline damage and leave difficult to remove residues (e.g., polymers).
A second problem with the described buried layer fabrication process is the formation of the silicon step resulting from the growth of the second oxide layer. Although the trend today is toward planarization, the silicon step produced at the surface is typically around 1800 .ANG. (or more). The steps provided by the process shown in FIG. 1 compromise the ability to print fine-line patterns in subsequent mask levels. This is due to light which reflects from the steps into regions which are not intended for exposure. In addition, because modern steppers have a limited depth-of-focus capability, a large step height reduces the manufacturing margin for achieving proper focus on subsequent levels.
A method of fabrication of buried layers which eliminates the dedicated plasma etch, improves planarity of the surface, and provides devices which can be fabricated more quickly and economically is needed.